Home » today » Technology » PL2 for mobile Alder Lake: 15W can take up to 55 watts, 45W to 115 watts

PL2 for mobile Alder Lake: 15W can take up to 55 watts, 45W to 115 watts

Thanks to the so-called Coreboot patch for Linux, we learn about the energy side of mobile processors from the generation Alder Lake. Although Intel reduces the number of large nuclei compared to previous generations in many models (and replaces large nuclei with more small and more energy-efficient Atoms), the limits of PL2 do not change for the better. Recall that while taking 14nm derivatives architecture Skylake Intel had no problem getting 15 large cores in 15W TDP, with 10nm generation Ice Lake it was already 4 large cores, with 10nm generation Tiger Lake with 4 large cores Intel has changed the default TDP from 15 to 28 watts and in 15W 10nm models of the Alder Lake generation, only 2 large cores are expected, supplemented by 4-8 small ones (Atoms):

However, PL2 limits, ie consumption during boost, do not decrease. Patches for Linux showed that:

  • Alder Lake-U in 15W design has a PL2 limit of 55 watts
  • The 28W Alder Lake-U has a PL2 limit of 64 watts
  • Alder Lake-H in 45W design has a PL2 limit of 115 watts

For comparison: Current 15W Tiger Lake PL2 has a limit of 54 watts, 28W according to the design of the laptop 54-64 watts and 45W model 107 watts (for 65W TDP the value is 135 watts, but the mobile Alder Lake with a TDP higher than 45W, we do not yet know the PL2 data – but these models are planned, see the last column of the slide above). PL2 limits will therefore increase by 1-8 watts intergenerationally, while the numbers of large nuclei will decrease by 2 (both generations by 4). 4-8 Atoms will be added instead.

In the mobile segment, Intel seems to emphasize even more the strategy of achieving high single-core performance on one of the lower number of large cores and high multi-core performance by engaging a higher number of Atoms. This will work well in benchmarks that generate a load on just one core (thread) and all cores (threads), or in applications that behave similarly. In situations where all the load is concentrated in just 3 threads, it will not Alder Lake-U with two large and eight small nuclei to be used optimally – two fibers will run and full, the third half (Atom) and the remaining seven Atoms will remain unused. In contrast, u Tiger Lake with the four large cores, all three fibers run fully on the large cores.

Of course, more such combinations can occur (this was just one of a number of possible examples) and a reasonably compromise solution (which would maintain a combination of large / small cores while rapidly reducing the number of CPU failures) would be either a more balanced number of large / small cores (eg 4 + 4 instead of 2 + 8) or a smaller power discrepancy between large and small cores. But that is another topic.

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