The Next Generation of IC Verification

Siemens Digital Industries Software is set to launch Questa One, a smart verification software portfolio designed to redefine integrated circuit (IC) verification. this innovative solution combines connectivity, a data-driven approach, and scalability with artificial intelligence (AI) to significantly boost engineering team productivity.

questa One aims to support the most complex designs, from IP to System-on-a-Chip (SoC) to Systems, with faster engines and streamlined workflows. It is specifically engineered for advanced 3D-ICs, chiplet-based designs, and software-defined architectures.

Addressing the Verification Productivity Gap

The Questa One smart verification solution is designed to overcome the Verification Productivity gap 2.0 bottleneck. This gap arises from the increasing complexity of technologies like 3D-ICs and the growing demand for enhanced security, lower power consumption, and greater reliability.

According to Abhi Kolpekwar, vice president & general manager, Digital Verification Technologies, Siemens Digital Industries Software, Questa One transforms the IC design process to address the verification productivity gap and solves the IC industry’s rapidly growing challenges associated with increasingly complex designs. He further emphasized that Questa One uses new technical advances to deliver the fastest functional, fault and formal verification engines available, yet customers tell us that performance alone isn’t enough – they also need deeper connectivity across our unmatched verification, validation and test workflows, wich Questa One provides. Combined with our submission of AI, Siemens’ verification solutions are truly yielding step-function gains in productivity by early adopters across smart creation, smart regression, smart analysis, smart engine and smart debug domains.

Key Technical Breakthroughs

Questa one incorporates several technical advancements:

• Coverage Acceleration: Questa One Coverage Acceleration software achieves coverage goals 50x faster than traditional testbench solvers.
• DFT Simulation Acceleration: Questa One DFT Simulation Acceleration software achieves 8x faster gate-level design for test (DFT) serial pattern simulations, leveraging Questa One Parallel Simulation software and is tightly integrated with the industry-leading Tessent™ Streaming Scan Network (SSN) architecture.
• Fault Simulation Acceleration: questa One Fault Simulation Acceleration software delivers 48x faster performance, supporting functional safety and DFT fault simulation applications. It uniquely supports the User Defined Fault Modeling (UDFM) capability in Tessent.
• Stimulus Free Verification: Questa One Stimulus Free Verification software reduces overall processing times from over 24 hours to under 1 minute on complex open source soc level reference designs. It integrates 20 different stimulus-free analyses,AI,and automation,delivering solutions like linting with auto-correction and generative AI SVA property creation and verification.

Questa One Avery Verification IP

Questa One Avery Verification IP software is based on Avery’s high-quality VIP and high-coverage Compliance Test Suites (CTS). Protocol-aware debug and protocol-aware coverage analytics help increase productivity, and accelerated VIP enables the same CTS, testbench and stimulus on Questa One Sim to be re-used on Veloce CS emulation and prototyping systems.

Core Principles of Questa One

The Questa One smart verification solution is built on three core principles:

• Connected Verification: Questa One Connected Verification software connects engineers, EDA tools, and verification IP to form a cohesive ecosystem for comprehensive verification, validation, and test across Siemens’ Questa One, Tessent DFT, and Veloce™ CS emulation and prototyping systems.
• Data-Driven Verification: Questa One Data-driven Verification software leverages AI-powered analytics to bring new insights and improve verification productivity. Applications of generative, prescriptive, and predictive machine learning technologies enable engineers to achieve the highest levels of verification with fewer resources.
• Scalable Verification: questa One Scalable verification software delivers acceleration and automation, providing the fastest verification closure and the highest degree of confidence.

Customer Testimonials

Early adopters have reported important improvements in verification productivity:

The Questa One Smart Verification Solution has improved our verification productivity across traditional on-premises and cloud deployments. As an early adopter of running large EDA workloads using the high-performance Questa One Sim advanced functional simulator, we’ve observed improvements in performance, cost-efficiency, and reduction in regression time on the latest AArch64 architecture.

Karima Dridi, head of Productivity Engineering, Arm

As an early influencer on Siemens Questa One Smart Verification Solution, MediaTek has already been able to increase our engineers’ productivity across the entire verification process utilizing both formal verification and simulation technologies. Questa one Property Assist utilizes generative AI to save us weeks of engineering time, and Questa One Regression Navigator predicts which simulation tests are most likely to fail, runs them first, and saves days of regression and debugging time.

Chienlin Huang, senior technical manager of Connectivity Technology department, MediaTek

Questa One DFT (QDX) simulation utilizes advanced DFT-centric simulation capabilities to deliver faster performance than existing simulation solutions, slashing our verification time from weeks to days. In addition to these impressive speed ups, on Microsoft’s Azure Cobalt 100 platform, QDX delivers up to 20 percent further performance jump unlocking even greater efficiency for our EDA workloads.

Selim Bilgin, corporate vice president, Silicon Engineering at Microsoft

Siemens’ Questa One smart verification solution has improved and streamlined our verification process, enabling us to address new-era data centre workloads like generative AI with state-of-the-art silicon IP solutions for PCIe, CXL and HBM interfaces. Leveraging the complete Questa One solution, including simulation, static and formal analysis, and verification IP technologies, brings increased confidence to our customers through comprehensive verification of IP solutions for their SoC and chiplet designs.

Susheel Tadikonda, vice president of Engineering, Silicon IP at Rambus

Availability

The Questa One smart verification solution is slated for release in June 2025. For more information, visit https://eda.sw.siemens.com.