Home » Business » mass production of 3nm chips starts in 2022, and a breakthrough has occurred in the development of 2nm standards

mass production of 3nm chips starts in 2022, and a breakthrough has occurred in the development of 2nm standards

After 5nm norms, 3nm will become the next important technological process for TSMC. According to the Taiwanese manufacturer, research and development for its 3nm process technology is progressing on schedule. The company recently announced that it will launch trial production in 2021. However, large-scale mass printing is due to start in the second half of 2022.

While it is still almost two years before TSMC’s 3nm process goes into mass production, many of its customers are already interested in these cutting edge standards. It is reported that TSMC is preparing four waves of deployment of 3nm manufacturing facilities. The lion’s share of the first wave will be transferred to Apple, which is quite expected. Starting with the A10 processor in the 2016 iPhone 7 series, Apple’s A series processors are exclusively manufactured at TSMC and are always given priority.

The 3nm process technology should significantly improve the performance and energy efficiency of the chips. At meetings dedicated to the company’s financial statements in the first and second quarters of this year, TSMC CEO Wei Zhejia said that compared to 5nm process technology, 3nm norms will increase the density of transistors by 70%, as well as increase frequencies chips by 10-15% with the same power consumption. In turn, energy efficiency at the same frequencies will increase by 25-30%.

According to Taiwan Economic Daily, TSMC has already achieved a major breakthrough in the 2nm process technology. The research and development process is now at an advanced stage. The company is optimistic that in the second half of 2023, the number of suitable crystals in its 2nm trial production could reach 90%. Supply chains also show that unlike 3nm and 5nm processes that use FinFETs, TSMC’s 2nm process uses a new MBCFET (Multi Bridge Channel FET) architecture, which will have a transistor channel that looks like several channels located one above the other in the form of nanopages, surrounded on all sides by a gate (about these transistors made by Samsung can be read in our material for March 14, 2019).

Last year, TSMC set up a 2nm norm R&D team to find the optimal development path. The use of MBCFET will allow to overcome the physical limit of leakage current for bulk transistors FinFET. TSMC previously announced that its 2nm process technology will be manufactured in Baoshan and Hsinchu. It also plans to build four huge P1-P4 super-large silicon wafer factories (450mm diameter) over 90 hectares. Given the current progress in research and development for TSMC’s 2nm regulations, the company should go into mass production in 2024.

If you notice an error, select it with the mouse and press CTRL + ENTER.

Leave a Comment

This site uses Akismet to reduce spam. Learn how your comment data is processed.